? semiconductor components industries, llc, 2009 june, 2009 ? rev. 3 1 publication order number: z0103mn/d z0103mn, z0107mn, z0109mn sensitive gate triac series silicon bidirectional thyristors designed for use in solid state re lays, mpu interface, ttl logic and other light industrial or consumer applications. supplied in surface mount package for use in automated manufacturing. features ? sensitive gate trigger current in four trigger modes ? blocking voltage to 600 v ? glass passivated surface for reliability and uniformity ? surface mount package ? these are pb ? free devices maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit peak repetitive off ? state voltage (note 1) (sine wave, 50 to 60 hz, gate open, t j = ? 40 to +125 c) v drm, v rrm 600 v on ? state current rms (t c = 80 c) (full sine wave 50 to 60 hz) i t(rms) 1.0 a peak non ? repetitive surge current (one full cycle sine wave, 60 hz, t c = 25 c) i tsm 8.0 a circuit fusing considerations (pulse width = 8.3 ms) i 2 t 0.4 a 2 s average gate power (t c = 80 c, t 8.3 ms) p g(av) 1.0 w peak gate current (t 20 s, t j = +125 c) i gm 1.0 a operating junction temperature range t j ? 40 to +125 c storage temperature range t stg ? 40 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. v drm and v rrm for all types can be applied on a continuous basis. blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. thermal characteristics characteristic symbol max unit thermal resistance, junction ? to ? ambient pcb mounted per figure 1 r ja 156 c/w thermal resistance, junction ? to ? tab meas- ured on mt2 tab adjacent to epoxy r jt 25 c/w maximum device temperature for soldering purposes for 10 secs maximum t l 260 c triac 1.0 ampere rms 600 volts mt1 g mt2 4 23 pin assignment 1 2 3 gate main terminal 1 main terminal 2 4 main terminal 2 http://onsemi.com sot ? 223 case 318e style 11 marking diagram ayw 10xmn a = assembly location y = year w = work week 10xmn = device code x = 3, 7, 9 = pb ? free package (note: microdot may be in either location) 1 device package shipping ? ordering information ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d. Z0103MNT1G sot ? 223 (pb ? free) 1000/tape & reel z0107mnt1g sot ? 223 (pb ? free) 1000/tape & reel z0109mnt1g sot ? 223 (pb ? free) 1000/tape & reel
z0103mn, z0107mn, z0109mn http://onsemi.com 2 electrical characteristics (t c = 25 c unless otherwise noted; electricals apply in both directions) characteristic symbol min typ max unit off characteristics peak repetitive blocking current t j = 25 c (v d = rated v drm , v rrm ; gate open) t j = +125 c i drm , i rrm ? ? ? ? 5.0 500 a a on characteristics peak on ? state voltage (i tm = 1.4 a peak; pulse width 2.0 ms, duty cycle 2.0%) v tm ? ? 1.56 v gate tri gger current (continuous dc) z0103mn (v d = 12 vdc, r l = 30 ohms) mt2(+), g(+) mt2(+), g( ? ) mt2( ? ), g( ? ) mt2( ? ), g(+) i gt 0.15 0.15 0.15 0.25 ? ? ? ? 3.0 3.0 3.0 5.0 ma gate tri gger current (continuous dc) z0107mn (v d = 12 vdc, r l = 30 ohms) mt2(+), g(+) mt2(+), g( ? ) mt2( ? ), g( ? ) mt2( ? ), g(+) i gt 0.15 0.15 0.15 0.25 ? ? ? ? 5.0 5.0 5.0 7.0 ma gate tri gger current (continuous dc) z0109mn (v d = 12 vdc, r l = 30 ohms) mt2(+), g(+) mt2(+), g( ? ) mt2( ? ), g( ? ) mt2( ? ), g(+) i gt 0.15 0.15 0.15 0.25 ? ? ? ? 10 10 10 10 ma latching current (v d = 12 v, i g = 1.2 x i gt ) z0103mn mt2(+), g(+) all types mt2(+), g( ? ) all types mt2( ? ), g( ? ) all types mt2( ? ), g(+) all types i l ? ? ? ? ? ? ? ? 7.0 15 7.0 7.0 ma latching current (v d = 12 v, i g = 1.2 x i gt ) z0107mn mt2(+), g(+) all types mt2(+), g( ? ) all types mt2( ? ), g( ? ) all types mt2( ? ), g(+) all types i l ? ? ? ? ? ? ? ? 10 20 10 10 ma latching current (v d = 12 v, i g = 1.2 x i gt ) z0109mn mt2(+), g(+) all types mt2(+), g( ? ) all types mt2( ? ), g( ? ) all types mt2( ? ), g(+) all types i l ? ? ? ? ? ? ? ? 15 25 15 15 ma gate trigger voltage (continuous dc) (v d = 12 vdc, r l = 30 ohms) v gt ? ? 1.3 v gate non ? trigger voltage (v d = 12 v, r l = 30 ohms, t j = 125 c) all four quadrants v gd 0.2 ? ? v holding current (z0103ma) (v d = 12 vdc, initiating current = 50 ma, gate open) (z0107ma, z0109ma) i h ? ? ? ? 7.0 10 ma dynamic characteristics rate of change of commutating current (v d = 400 v, i tm = 0.84 a, commutating dv/dt = 1.5 v/ s, gate open, t j = 110 c, f = 250 hz, with snubber) di/dt(c) 1.6 ? ? a/ms critical rate of rise of off ? state voltage (v d = 67% rated v drm , exponential waveform, gate open, t j = 110 c) z0103mn z0107mn z0109mn dv/dt 10 20 50 30 60 75 ? ? ? v/ s repetitive critical rate of rise of on ? state current, t j = 125 c pulse width = 20 s, ipkmax = 15 a, dig/dt = 1 a/ s, f = 60 hz di/dt ? ? 20 a/ s
z0103mn, z0107mn, z0109mn http://onsemi.com 3 + current + voltage v tm i h symbol parameter v drm peak repetitive forward off state voltage i drm peak forward blocking current v rrm peak repetitive reverse off state voltage i rrm peak reverse blocking current voltage current characteristic of triacs (bidirectional device) i drm at v drm on state off state i rrm at v rrm quadrant 1 mainterminal 2 + quadrant 3 mainterminal 2 ? v tm i h v tm maximum on state voltage i h holding current mt1 (+) i gt gate (+) mt2 ref mt1 ( ? ) i gt gate (+) mt2 ref mt1 (+) i gt gate ( ? ) mt2 ref mt1 ( ? ) i gt gate ( ? ) mt2 ref ? mt2 negative (negative half cycle) mt2 positive (positive half cycle) + quadrant iii quadrant iv quadrant ii quadrant i quadrant definitions for a triac i gt ? + i gt all polarities are referenced to mt1. with in ? phase signals (using standard ac lines) quadrants i and iii are used.
z0103mn, z0107mn, z0109mn http://onsemi.com 4 figure 1. pcb for thermal impedance and power testing of sot-223 0.079 2.0 0.079 2.0 0.059 1.5 0.091 2.3 0.091 2.3 mm inches 0.472 12.0 0.096 2.44 board mounted vertically in cinch 8840 edge connector. board thickness = 65 mil., foil thickness = 2.5 mil. material: g10 fiberglass base epoxy 0.984 25.0 0.244 6.2 0.059 1.5 0.059 1.5 0.096 2.44 0.096 2.44 0.059 1.5 0.059 1.5 0.15 3.8
z0103mn, z0107mn, z0109mn http://onsemi.com 5 t a , maximum allowable ambient temperature ( c) 110 100 90 80 60 50 70 i t(rms) , rms on\state current (amps) 110 100 90 80 60 50 40 30 20 70 t a , maximum allowable ambient temperature ( c) figure 2. on-state characteristics figure 3. junction to ambient thermal resistance versus copper tab area figure 4. current derating, minimum pad size reference: ambient temperature figure 5. current derating, 1.0 cm square pad reference: ambient temperature foil area (cm 2 ) ja , junction to ambient thermal v t , instantaneous on\state voltage (volts) i t , instantaneous on\state current (amps) i t(rms) , rms on\state current (amps) figure 6. current derating, 2.0 cm square pad reference: ambient temperature 10 1.0 0.1 0.01 5.0 4.0 3.0 2.0 30 60 70 80 90 160 2.0 0 110 0.5 0.3 0.2 0.1 0 i t(rms) , rms on\state current (amps) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.5 0.4 0.3 0.2 0.1 0 1.0 0 4.0 6.0 8.0 10 100 90 80 60 50 40 30 20 0.6 0.7 0.8 resistance, c/w 150 140 130 120 110 40 50 100 typical maximum 4 1 23 minimum footprint = 0.076 cm 2 device mounted on figure 1 area = l 2 pcb with tab area as shown 0.4 70 t a , maximum allowable ambient temperature ( c) dc 30 60 90 = 180 dc 30 minimum footprint 50 or 60 hz 120 t (tab) , maximum allowable tab temperature ( c) 110 105 100 95 90 85 80 i t(rms) , on\state current (amps) figure 7. current derating reference: mt2 tab 0.5 0.4 0.3 0.2 0.1 0 0.6 0.7 0.8 120 dc 30 120 r l l 90 120 90 60 30 90 typical at t j = 110 c max at t j = 110 c max at t j = 25 c 60 = 180 1.0 cm 2 foil area 50 or 60 hz dc = 180 = 180 reference: figure 1 60 = conduction angle 4.0 cm 2 foil area = conduction angle = conduction angle = conduction angle
z0103mn, z0107mn, z0109mn http://onsemi.com 6 commutating dv/dt dv/dt , (v/ s) c figure 8. power dissipation p (av) , maximum average power dissipation (watts) 1.0 0.8 0.7 0.5 0.4 0.2 0 i t(rms) , rms on\state current (amps) figure 9. thermal response, device mounted on figure 1 printed circuit board 0.5 0.4 0.3 0.2 0.1 0 0.6 0.7 0.8 dc 90 120 10 1.0 di/dt c , rate of change of commutating current (a/ms) t, time (seconds) r(t), transient thermal 0.01 1.0 0.001 0.0001 1.0 0.01 0.1 10 100 10 resistance (normalized) 0.1 10 1.0 t j , junction temperature ( c) 90 80 70 60 100 110 v drm = 200 v 400 hz 300 hz 0.9 0.6 0.3 0.1 1.0 110 v drm i tm 60 hz t w 30 f = 1 2 t w commutating dv/dt dv/dt , (v/ s) c 60 80 180 hz = 180 60 (di dt) c 6fi tm 1000 100 = conduction angle figure 10. simplified test circuit to measure the critical rate of rise of commutating voltage (dv/dt) c l l 1n4007 200 v + measure i - charge control charge trigger non\polar c l 51 mt2 mt1 1n914 g trigger control 200 v rms adjust for i tm , 60 hz v ac note: component values are for verification of rated (dv/dt) c . see an1048 for additional information. r s adjust for dv/dt (c) c s figure 11. typical commutating dv/dt versus current crossing rate and junction temperature figure 12. typical commutating dv/dt versus junction temperature at 0.8 amps rms
z0103mn, z0107mn, z0109mn http://onsemi.com 7 static dv/dt (v/ s) 60 20 r g , gate - main terminal 1 resistance (ohms) figure 13. exponential static dv/dt versus gate ? main terminal 1 resistance 10 10,000 figure 14. typical gate trigger current variation t j , junction temperature ( c) 0.1 10 0 -40 20 100 i 1.0 v , gate trigger voltage (volts) 1.1 0.3 t j , junction temperature ( c) -40 gt 600 v pk t j = 110 c i gt4 i gt1 50 40 30 1000 100 i gt3 i gt2 gt , gate trigger current (ma) -20 40 60 80 0 20 100 -20 40 60 80 v gt2 v gt1 v gt3 v gt4 main terminal #2 positive main terminal #1 positive holding current (ma) 6.0 0 t j , junction temperature ( c) figure 15. typical holding current variation -40 5.0 4.0 3.0 2.0 1.0 i , h 0 20 100 -20 40 60 80 main terminal #2 positive main terminal #1 positive figure 16. gate trigger voltage variation
z0103mn, z0107mn, z0109mn http://onsemi.com 8 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue l style 11: pin 1. mt 1 2. mt 2 3. gate 4. mt 2 a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint* h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 z0103mn/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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